CMX998 – Cartesian Feedback Loop Transmitter

CMX998

Q. What is the specification for the accuracy of the CMX998 transmitter in terms of I/Q phase and amplitude balance?

A. The modulation accuracy of a CMX998 transmit is determined by the down-converter (feedback path).
The I/Q amplitude and phase balance of the down-converter is therefore the key factor in determining the contribution the CMX998 makes to a transmitters modulation accuracy.
In practice it doesn’t matter if the I/Q error is an amplitude imbalance or a phase imbalance, it is the total error that is important.
For this reason the CMX998 specifies the I/Q phase and amplitude balance as a composite in terms of ‘Feedback path Image Suppression’.
A worst-case value of –30dB is guaranteed.
The parameter can be calculated from I/Q phase and amplitude balance using the following formula:

Image Suppression / dBc = 10*log[((k^2+1)-2*k*cos(theta)) / ((k^2+1)+2*k*cos(theta))]
Where: k = amplitude balance (linear I/Q ratio
Select I/Q or Q/I for ratio = <1)
theta = phase balance

Q. Can the CMX998 be used for TETRA 2?

A. Yes, the CMX998 meets the linearity and wideband noise requirements of TETRA QAM modes for 25kHz, 50kHz, 100kHz and 150kHz channels.
Note that a different loop-filter might be required for the 100kHz and 150kHz channels.

Q: How do I control the CMX994 or CMX998 on the DE9941 board?

A: The DE9941 includes the CMX7164 Multi-Mode Modem, the CMX998 Cartesian Feedback Loop Transmitter, and the CMX994 Direct Conversion Receiver.  When the PE0003 Ev Kit Interface Card is used as the host controller for DE9941, the PE0003 communicates with the CMX998 and CMX994 through the CMX7164’s SPI Thru-Port.  The CMX7164 SPI Thru-Port is beneficial because it allows control of peripherals with fewer uC pins and PCB traces.

There are three CMX7164 internal registers that are key for this discussion:

– $62, SPI Thru-Port Control

– $63, SPI Thru-Port Write

– $78, SPI Thru-Port Read

CMX7164 register $78 comes into play when you need to read an external device register.  CMX7164 register $63 contains the value to be written to an external device register, and CMX7164 register $62 defines important C-BUS/SPI parameters such as:

– Which Chip Select will be used for the transaction

– If the transaction will be read or write

– Number of bytes to be written to the target device

– CMX7164 IRQ behavior when the write is completed

– The address of the target device

For example, let’s say we need to write 0xFC to CMX998 register $02 using the CMX7164 SPI Thru-Port.  Pseudocode of the required SPI Thru-Port transaction would look like this:

– Host writes 0xFC to CMX7164 register $63

– Host then writes 0x4102 to CMX7164 register $62 (SSOUT1, Interrupt when the C-BUS Thru-Port Control/Write registers are free, write transaction, 1 data byte, register address $02)

To do this same transaction in the PE0003 graphical user interface (GUI):

– Select “C-BUS Control” tab and observe the “Write a Register” area

– Ensure “16 bit” is checked

– Enter 63 for “Register Address”, enter FC for “Register Data”, and then click “Write”

– Enter 62 for “Register Address”, enter 4102 for “Register Data”, and then click “Write”

Here is a pseudocode example of a read transaction using the SPI Thru-Port.  In this example, CMX998 “readback” register $F2 will be read out:

– Host writes $71F2 to $62 (SSOUT1, Interrupt when read or write operation triggered by this Thru-Port command is completed on the SPI port, read transaction, 1 data byte, register address $F2)

– Host waits for IRQ

– Host reads CMX7164 register $78 to obtain the data

To do this same transaction in the PE0003 GUI:

– Select “C-BUS Control” tab and observe the “Write a Register” area

– Ensure “16 bit” is checked

– Enter 62 for “Register Address”, enter 71F2 for “Register Data”, then click “Write”

– Move over to the “Read a Register” area

– Enter 78 for “Register Address”, then click “Read”.  The data will appear in the grayed-out data box.

Control of the CMX994 Direct Conversion Receiver is performed in the same manner.

. When using the CMX998 Cartesian loop IC with its evaluation kit (EV9980) I have seen degradation in carrier leakage when I enable the RF detector after the DC calibration phase.
What can I do to ensure a stable carrier leakage when I enable the RF detector?

A. In some configurations of the EV9980 the DC offset adjustment appears degraded when DCMEAS is set to “0” to “1”.
That is to say when the RF detector output is connected to the DCMEAS pin following a DC calibration procedure. The cause of this is internal offsets that result in a small, (nominally 5mV), shift in VREF and BVREF when the change is made.
The effect is shown in Table 1 (below):

Table 1 – Carrier leakage achieved with for various conditions of DCMEAS and associated control signals, PA enabled (+30dBm mean power with modulation), 450MHz, Divide by 2 LO

The transmitter is configured for +30dBm mean output power, TETRA pi/4-DQPSK or two-tone modulation, so a carrier null of ?33dBm is -63dBc, where ‘c’ is based on the mean signal power.

When DCMEAS = ‘1’ and the RF detector is enabled a degradation in carrier offset is observed with a previously adjusted carrier null. This issue can be greatly reduced if the alternative configuration for applying a bias voltage to the input signal is used, as documented in EV9980 Datasheet version 5 and above.
With PCB555D in ‘Mod State’ 3 or 5 the BVREF signal is used to bias the input signal. This means a common shift is applied to DC offset correction signal and modulator reference.

The results from this improved configuration are also shown in Table 1 and although a small degradation is still observed the carrier leakage is still -52dBc, which is considered more than adequate for most applications.

For clarification, the relevant change is: R5=5k1 (formerly NF) R7=NF (formerly 20k), R53=NF (formerly 20k), R57=5k1 (formerly NF).
This change can be applied to PCB555C and well as PCB555D.

Notes:
1. PCB555C (all ‘Mod States’) and PCB555D ‘Mod States’ 2 and 4.
2. PCB555D ‘Mod States’ 3 and 5.

Q. Can you help explain how the instability detector on the CMX998 operates and how it can be used?

A. The instability detector found on the CMX998 is a relatively simple mechanism that measures the level of out-of band energy of the feedback loop.
If the loop becomes unstable due to phase inaccuracies the feedback loop will tend to spill energy out-of band.
The instability detector comprises a high-pass filter followed by a peak-detector circuit and this combination indicates the presence of this high frequency energy.

As phase error increases, the instability detector will show a worsening level of out-band energy.
The classic behaviour of the Cartesian loop is for the output band energy to ‘peak’ close to the edge of the loop-bandwidth. This ‘peak’ will occur at -ve frequency or +ve frequency depending on whether the phase error is a lead or a lag.
Note: The CMX998 instability detector cannot detect lead or lag error as it works on a simple baseband signal.

The error signal produced by the instability detector should be accessed for a particular design and an appropriate threshold set.
The CMX998 includes gain adjustment to make threshold setting easier.

Note: If the loop is set up 180 degrees out of phase the loop will oscillate and will generally produce a maximum level carrier.
As this is effectively a stable oscillating condition the instability detector will not detect this operating state.
The instability detector is designed to detect minor phase variations and resultant instability following initial phase correction.
Typical changes are variations in antenna VSWR and thermal effects. Such effects are unlikely to cause a phase shift as large as 180 degrees.

If instability is detected then normal procedure is to power down the transmitter. If a design supports dynamic loop phase calibration then an instability detector event normally triggers loop re-calibration.

Q. What Wide Band Noise performance can I expect for say TETRA radio applications?

A. The linked plot of wideband noise 998_2.pdf is the result of using the CMX998 CFL IC in a typical application (i.e. 1W TETRA design).
The measurements include the effects of the non-ideal PA that is corrected by the Cartesian loop.
The wideband noise of the CMX998 alone (at 5MHz offset) is typically somewhat better than shown in this plot. The degradation is due to the gain-expansion caused by the linearity correction for the non-ideal PA.

Q. I am looking to develop a high quality non-constant envelope transmitter and am looking to improve the linearity of my current design. Could you give me an indication of the improvements I could achieve if I use your Cartesian Feedback Loop IC?

A. The linked plot  998_1 shows the benefits of the CMX998 Cartesian Feedback Loop, when used with the CMX981 in a 1W (mean) 2W (PEP) TETRA application.

EV9980 FAQ

Q. When using the CMX998 Cartesian loop IC with its evaluation kit (EV9980) I have seen degradation in carrier leakage when I enable the RF detector after the DC calibration phase.
What can I do to ensure a stable carrier leakage when I enable the RF detector?

A. In some configurations of the EV9980 the DC offset adjustment appears degraded when DCMEAS is set to “0” to “1”.
That is to say when the RF detector output is connected to the DCMEAS pin following a DC calibration procedure. The cause of this is internal offsets that result in a small, (nominally 5mV), shift in VREF and BVREF when the change is made.
The effect is shown in Table 1 (below):

Table 1 – Carrier leakage achieved with for various conditions of DCMEAS and associated control signals, PA enabled (+30dBm mean power with modulation), 450MHz, Divide by 2 LO.

The transmitter is configured for +30dBm mean output power, TETRA pi/4-DQPSK or two-tone modulation, so a carrier null of 33dBm is -63dBc, where ‘c’ is based on the mean signal power.
When DCMEAS = ‘1’ and the RF detector is enabled a degradation in carrier offset is observed with a previously adjusted carrier-null. This effect can be avoided by using BVREF to bias the input signal rather than using a resistor network tied to 3.3V.

With PCB555D in ‘Mod State’ 3 or 5 the BVREF signal is already used to bias the input signal in single ended mode. This means a common shift is applied to DC offset correction signal and modulator reference. The results from this improved configuration are also shown in Table 1 and although a small degradation is still observed the carrier leakage is still -52dBc, which is considered more than adequate for most applications.

Figure 1 and Table 2 show what modifications are required to be made to EV9980 Evaluation Kits which are not Mod State 3 or 5 and so which have not already been modified to allow VBREF biasing of the input signal. Both Single Ended and Differential modes are shown.

Figure 1 – Signal Input Layout

Table 2 – Modified Component Values.

Figure 1 and Table 2 show what modifications are required to unmodified EV9980 Evaluation Kits (e.g., Mod State 4) to allow VBREF biasing of the input signal.
Both Single Ended and Differential modes are shown.

Q. Are there any particular aspects of power-up or down sequence of the EV9980 that I should be aware of?

A. There is nothing specific to be aware of when powering the EV9980 up for the first time, however it is very important to ensure that a 50ohm load is attached to J9 before enabling the power amplifier.
The PA device is not protected and enabling this device without the load may irreparably dame the device.

There is a preferred method of powering down the EV9980 to also avoid damage to the power amplifier (PA).
This is because, if the PA is powered down before the CMX998, the PA can be overdriven to the point of failure. The output power will decrease once the PA is powered down, and this results in a lower signal level fed back into the CMX998.

The error amplifier input signal levels will diverge, so the error signal to the up converter will increase, and the signal level to the PA input will also increase.
This process will continue as the PA output ramps down, with the up converter output and PA input signal level continuously increasing.
This can over-drive the PA which may over-current and fail.

The recommended way to avoid this is to power-down the CMX998 down-converter before powering down the PA.
Within the EV9980 GUI software, clearing the “Feedback Path En.” box (“CMX998 Regs ($01-$06)” tab) and clicking on “Write Gen Ctl Reg” will powerdown the CMX998 down-converter.

Signal Levels
Q. I am just starting to investigate the CMX998 and am using an EV9980 Evaluation Kit. Do you have any recommended signal-levels that will allow me to see the CMX998 at its best?

A. The Cartesian Feedback Loop IC, CMX998 does indeed have an optimal operating range.
The hyperlinked illustration (EV9980_Levels) shows what signal levels we recommend and where measurements may be taken when using the EV9980. It is always recommended that you refer to the current EV9980 User Manual and the CMX998 Datasheet regarding use and set-ups.