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CMX940 Hops to a Faster Beat

11:50 17 February in Blog, Latest, RF Building Blocks

    A good integrated synthesizer design is a balance of competing requirements depending on the target application. The CMX940 High Performance RF Synthesizer balances exceptional low noise performance, low power and now, following the publication of a new Application Note, demonstrates extremely fast switching times.

    To achieve the quoted very low in-loop noise floor, typically -125 dBc/Hz, whilst avoiding boundary spurious, a novel dual PLL architecture has been adopted.  This arrangement applies a very low noise reference PLL alongside the main synthesizer PLL.  The arrangement achieves both low noise and wide 49 – 2040 MHz operation.

    Diagram of CMX940 Dual PLL Architecture

    CMX940 Dual PLL Architecture








    To facilitate smaller integrated designs the on-chip VCOs would normally be used.  These VCOs are supported by an on-chip auto-calibration function that ensures accurate performance across the entire frequency range.

    As with any form of calibration method, it takes a finite amount of time to achieve the desired results; in this instance the loops are calibrated and locked, and a stable and accurate frequency is output.  However, in some cases this process may exclude the CMX940 from certain applications where rapid changes in frequency are required.  For example, frequency hopping applications demand a synthesizer that can jump rapidly from one stable frequency to another (just a few 100µs is not unusual).

    To support such requirements CML has published an application note- CMX940 PLL Fast Lock Method.  This Application Note highlights the ability to update the calibrated VCOs using known Calibration Code Parameters that can be written directly to the respective VCOs.

    Additionally, the ability to modify these values on-the-fly is highlighted.  This is a useful feature should the VCO frequency drift whilst in operation, for example due to temperature fluctuations.

    An example is shown that illustrates and tests a method of switching between frequencies whilst using the discussed method, achieving less than 50µs switching time.  The PE0003 script for this example is also provided along with a set of results showing how effective this approach can be.

    Graph showing Fast Lock Time

    A Fast Lock Time










    The CMX940 can be shown to offer the best compromise for applications requiring low noise, low power consumption and fast frequency switching.

    The CMX940 PLL Fast Lock Method application note is available now from the CMX940 product page here.

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