- Resources:
- FX919B datasheet
- |
- MX919B datasheet
- |
- application notes
- |
- FAQs
- |
- evaluation
- |
Features
- 4-Level FSK Modulation
- Half Duplex, 4.8kb/s to 19.2kb/s Operation
- Full Data Packet Framing
- Flexible Operation Modes Host Processor Interface
- EV9000 EvKit Available
Applications
- High-Speed Packet Data
- Wireless Bar Code Readers
- Point-Of-Sale Terminals
Package Styles:
- FX919BD2 - FX919BD5 - FX919BP4
- MX919BDW - MX919BDS - MX919BLH - MX919BP
- MX919BDW - MX919BDS - MX919BLH - MX919BP
Supply Requirement:
3.0V power supply
Description
The FX/MX919B is a CMOS integrated circuit that contains all of the baseband signal processing and Medium Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data Modem. It interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver reliable two-way transfer of the application data over the wireless link.
The FX/MX919B is backwards compatible with the FX/MX919A but offers better performance during radio link fading and selectable Tx symbol shapes.
The FX/MX919B assembles application data received from the processor, adds forward error correction (FEC) and error detection (CRC) information and interleaves the result for burst-error protection.
After adding symbol and frame synchronisation codewords, it converts the packet into a filtered 4-level analogue baseband signal for modulating the radio transmitter. In receive mode, the FX/MX919B performs the reverse function using the analogue baseband signals from the receiver discriminator.
After error correction and removal of the packet overhead, the recovered application data is supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the SNR value during receipt of a packet is also provided.
The FX/MX919B uses data block sizes and FEC/CRC algorithms suitable for applications which require the high-speed transfer of data over narrow-band wireless links. The device is programmable to operate at most standard bit-rates from a wide choice of Xtal/clock frequencies.
The FX/MX919B is a CMOS integrated circuit that contains all of the baseband signal processing and Medium Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data Modem. It interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver reliable two-way transfer of the application data over the wireless link.
The FX/MX919B is backwards compatible with the FX/MX919A but offers better performance during radio link fading and selectable Tx symbol shapes.
The FX/MX919B assembles application data received from the processor, adds forward error correction (FEC) and error detection (CRC) information and interleaves the result for burst-error protection.
After adding symbol and frame synchronisation codewords, it converts the packet into a filtered 4-level analogue baseband signal for modulating the radio transmitter. In receive mode, the FX/MX919B performs the reverse function using the analogue baseband signals from the receiver discriminator.
After error correction and removal of the packet overhead, the recovered application data is supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the SNR value during receipt of a packet is also provided.
The FX/MX919B uses data block sizes and FEC/CRC algorithms suitable for applications which require the high-speed transfer of data over narrow-band wireless links. The device is programmable to operate at most standard bit-rates from a wide choice of Xtal/clock frequencies.
