top menu
Site Menu Site Search
Search Results

CFBL Transmitter



  • Frequency Range: 30MHz to 1GHz
  • Wideband Noise: ‑148dBc/Hz
  • C-BUS (SPI Compatible) Serial Interface
  • Gain Control, Error Amplifier
  • Up-Converter Forward Path
  • Down-Converter for Feedback Linearisation
  • 360o Loop Phase Shift Control
  • DC Offset Measurement Output
  • Open-Loop Function, Instability Detector
  • Linearisation Gains of 30dB or more Achievable
  • Flexible Digital Interface


  • TETRA/TETRA2 Terminals
  • APCO P25 Phase 2
  • Software Defined Radio (SDR)
  • Aviation Systems
  • Mobile Satellite Terminals
  • Linear Modulation Schemes:

Supply Requirement:

  • 3.0 to 3.6 V power supply

A Cartesian Feedback Loop (CFBL) Transmitter improves the efficiency and linearity of transmitters for non-constant envelope modulation systems.

The CMX998 is an integrated solution for a linear based Cartesian Feedback Loop (CFBL) transmitter.

Acting as a direct conversion quadrature mixer from I and Q to RF output, it provides the capability to linearise the Power Amplifier (PA) via feedback from the PA's output.

Included are forward and feedback paths; local oscillator circuitry including loop phase control; an instability detector and uncommitted op-amps for input signal conditioning.

The differential inputs are ideal for direct connection to standard modems and interface ICs such as CML’s CMX7163 QAM Data Modem, CMX7164 Multi Mode Wireless Data Modem, CMX910 AIS Baseband Signal Processor, CMX981 Digital Radio Baseband Processor , CMX983 Analogue Front End (AFE) for Digital Radio and CMX7861 Programmable Baseband Interface IC

Block Image

CMX998 Block Diagram

Design Support Information



Q. What is the specification for the accuracy of the CMX998 transmitter in terms of I/Q phase and amplitude balance?

A. The modulation accuracy of a CMX998 transmit is determined by the down-converter (feedback path).
The I/Q amplitude and phase balance of the down-converter is therefore the key factor in determining the contribution the CMX998 makes to a transmitters modulation accuracy.
In practice it doesn’t matter if the I/Q error is an amplitude imbalance or a phase imbalance, it is the total error that is important.
For this reason the CMX998 specifies the I/Q phase and amplitude balance as a composite in terms of ‘Feedback path Image Suppression’.
A worst-case value of –30dB is guaranteed.
The parameter can be calculated from I/Q phase and amplitude balance using the following formula:

Image Suppression / dBc = 10*log[((k^2+1)-2*k*cos(theta)) / ((k^2+1)+2*k*cos(theta))]
Where: k = amplitude balance (linear I/Q ratio
Select I/Q or Q/I for ratio = <1)
theta = phase balance

Q. Can the CMX998 be used for TETRA 2?

A. Yes, the CMX998 meets the linearity and wideband noise requirements of TETRA QAM modes for 25kHz, 50kHz, 100kHz and 150kHz channels.
Note that a different loop-filter might be required for the 100kHz and 150kHz channels.

Q. When using the CMX998 Cartesian loop IC with its evaluation kit (EV9980) I have seen degradation in carrier leakage when I enable the RF detector after the DC calibration phase.
What can I do to ensure a stable carrier leakage when I enable the RF detector?

A. In some configurations of the EV9980 the DC offset adjustment appears degraded when DCMEAS is set to "0" to "1".
That is to say when the RF detector output is connected to the DCMEAS pin following a DC calibration procedure. The cause of this is internal offsets that result in a small, (nominally 5mV), shift in VREF and BVREF when the change is made.
The effect is shown in Table 1 (below):

DC On RF Det. DCMEAS Carrier leakage with DC offset adjusted on
RV1/RV2 with Fixed bias offset (Note 1)
Carrier leakage with DC offset adjusted on
RV1/RV2 with BVREF used for bias offset (Note 2)
1 0 0 -33dBm (-63dBc) -26dBm (-56dBc)
1 1 0 -33dBm (-63dBc) -27dBm (-57dBc)
0 1 0 -24dBm (-54dBc) -27dBm (-57dBc)
0 1 1 -4dBm (-34dBc) -22dBm (-52dBc)
1 1 1 -4dBm (-34dBc) -22dBm (-53dBc)
0 0 1 -23dBm (-53dBc) -28dBm (-58dBc)

Table 1 - Carrier leakage achieved with for various conditions of DCMEAS and associated control signals, PA enabled (+30dBm mean power with modulation), 450MHz, Divide by 2 LO

The transmitter is configured for +30dBm mean output power, TETRA pi/4-DQPSK or two-tone modulation, so a carrier null of ?33dBm is -63dBc, where 'c' is based on the mean signal power.

When DCMEAS = '1' and the RF detector is enabled a degradation in carrier offset is observed with a previously adjusted carrier null. This issue can be greatly reduced if the alternative configuration for applying a bias voltage to the input signal is used, as documented in EV9980 Datasheet version 5 and above.
With PCB555D in 'Mod State' 3 or 5 the BVREF signal is used to bias the input signal. This means a common shift is applied to DC offset correction signal and modulator reference.

The results from this improved configuration are also shown in Table 1 and although a small degradation is still observed the carrier leakage is still -52dBc, which is considered more than adequate for most applications.

For clarification, the relevant change is: R5=5k1 (formerly NF) R7=NF (formerly 20k), R53=NF (formerly 20k), R57=5k1 (formerly NF).
This change can be applied to PCB555C and well as PCB555D.

1. PCB555C (all 'Mod States') and PCB555D 'Mod States' 2 and 4.
2. PCB555D 'Mod States' 3 and 5.

Q. Can you help explain how the instability detector on the CMX998 operates and how it can be used?

A. The instability detector found on the CMX998 is a relatively simple mechanism that measures the level of out-of band energy of the feedback loop.
If the loop becomes unstable due to phase inaccuracies the feedback loop will tend to spill energy out-of band.
The instability detector comprises a high-pass filter followed by a peak-detector circuit and this combination indicates the presence of this high frequency energy.

As phase error increases, the instability detector will show a worsening level of out-band energy.
The classic behaviour of the Cartesian loop is for the output band energy to 'peak' close to the edge of the loop-bandwidth. This 'peak' will occur at -ve frequency or +ve frequency depending on whether the phase error is a lead or a lag.
Note: The CMX998 instability detector cannot detect lead or lag error as it works on a simple baseband signal.

The error signal produced by the instability detector should be accessed for a particular design and an appropriate threshold set.
The CMX998 includes gain adjustment to make threshold setting easier.

Note: If the loop is set up 180 degrees out of phase the loop will oscillate and will generally produce a maximum level carrier.
As this is effectively a stable oscillating condition the instability detector will not detect this operating state.
The instability detector is designed to detect minor phase variations and resultant instability following initial phase correction.
Typical changes are variations in antenna VSWR and thermal effects. Such effects are unlikely to cause a phase shift as large as 180 degrees.

If instability is detected then normal procedure is to power down the transmitter. If a design supports dynamic loop phase calibration then an instability detector event normally triggers loop re-calibration.

Q. What Wide Band Noise performance can I expect for say TETRA radio applications?

A. The linked plot of wideband noise 998_2.pdf is the result of using the CMX998 CFL IC in a typical application (i.e. 1W TETRA design).
The measurements include the effects of the non-ideal PA that is corrected by the Cartesian loop.
The wideband noise of the CMX998 alone (at 5MHz offset) is typically somewhat better than shown in this plot. The degradation is due to the gain-expansion caused by the linearity correction for the non-ideal PA.

Q. I am looking to develop a high quality non-constant envelope transmitter and am looking to improve the linearity of my current design. Could you give me an indication of the improvements I could achieve if I use your Cartesian Feedback Loop IC?

A. The linked plot  998_1.pdf  shows the benefits of the CMX998 Cartesian Feedback Loop, when used with the CMX981 in a 1W (mean) 2W (PEP) TETRA application.

View our news as RSS Visit our twitter feed Visit our Youtube channel Visit our LinkinIn page Visit our facebook page
Web design by S-Digital
Copyright © 2014 CML Microsystems Plc