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Communications Controller IC

CMX850


Features:

  • External LCD Controller Interface
  • Tx and Rx DTMF/Tones
  • Line and Phone Differential Amplifiers
  • Dual Clock Modes with Separate Xtals
  • Call Progress Decoder
  • CAS Tone Detection and Generation
  • 'Line Reverse', 'Ring' and 'Off-Hook' Detection
  • Low Power Operation with 'Powersave' and 'Sleep' Modes
  • A-to-D Converter - Keypad (8x16)-  GPIO-2 x Low Power PWM Outputs

Applications:

  • SMS and ADSI Terminals
  • Telemetry and Remote Meter Reading Systems
  • Security and Alarm Systems
  • Call Routers
  • FeaturePhones
  • EPOS Terminals
  • Internet Appliances

Supply Requirement:

  • 3.0 to 3.6 V power supply

The CMX850 combines a dual-port V.22bis modem with an 8051 microcontroller including 8k of RAM to form a powerful communications processor.

Extended addressing offers page-mode access to 4Mbytes of external FLASH memory.

The 8051 runs from the ~12MHz oscillator with a choice of sub-multiple frequencies down to ~12kHz giving a range of low power operating modes.

The supply voltage is in the range: 3.0 to 3.6 V. A Watchdog Timer and standard 8051 Timers are included. I/O facilities include an LCD controller interface, 8x16 keypad interface with interrupts, a UART, two low-power PWM outputs, and a multiplexed 2-input 10-bit A-to-D converter. Unused functions can be alternatively used as GPIO.

Low power and very low power (sleep) modes contribute to low battery consumption.

The MUXAD pin allows the 8051 to multiplex the eight lower address and data bus lines to release further pins for I/O (debug support etc.).

The V.22bis modem can be woken from sleep mode by ‘ringing’ or ‘line-reversals’.

The CMX850 is an extremely compact and low-power microcircuit that will satisfy all of the Communications, control, data and signalling requirements of any wireline end-product using on-line communication.

Block Diagram

The CMX850 combines a dual-port V.22bis modem with an 8051 microcontroller including 8k of RAM to form a powerful communications processor

Design Support Information

 

CMX850 FAQ
 

Q What is the input impedance of the ADC?

A. If you're using the track/hold circuit on the VINA or VINB input, it will be connected to the input of the track/hold op-amp within the CMX850 via an analogue switch. This will be a very high DC impedance, typically greater than 100 MegOhms. If you're not using the track-hold circuit, the input gets connected directly to the input of a clocked comparator in the successive-approximation ADC. The comparator input is effectively a 2pF capacitor which gets switched alternately between the analogue input pin and an internal reference DAC. In this case, even though the comparator input is capacitive, it should be driven from a reasonably low impedance source (a few kohms or less) to prevent the charge on the switched capacitor from disturbing the input signal.


Q. Can you explain the serial download process required when downloading user code when employing the internal thin stub?

A. The function of the CMX850 boot ROM is to allow the download of a small program into the internal SRAM (XDATA) and then run it. Generally, the main purpose for this is to download and run a ‘fat’ stub which, in-turn, will allow a much larger application program to be downloaded and written to external FLASH program memory in-situ.

Boot ROM operation
The hardware Boot ROM code runs from the reset vector. The serial port is setup and the download of code into XDATA memory is started. The program will accept data from the serial port at 19200 baud, 8 bits, and no parity until a break in transmission is detected. Once the download is complete the data is validated using the following block format.

Address Contents
0000 FIRST DATA BYTE ....

nnnn-2 LAST DATA BYTE

End of data download, indicated by continuous 1’s for >1.25ms

nnnn-1 Length MSB

nnnn Length LSB

Where nnnn is the number of bytes in the downloaded block including the length bytes, and Length is the number of bytes (nnnn+1) plus 256 (0x100)

Full 8k download is a special case and has a check value of 0x2100

If the block validates ok then the serial port is disabled and execution switches to the code in the XDATA area at address 0x0000, the restart vector.

An Example
To load code, assemble the code into an .asm file, eg:

@0000 - 75 fa 48 90 01 23 74 45 f0 90 00 03 e0 90 23 14

@0010 - f0 02 00 00

Now add two extra bytes to this, unknown at the moment

@0000 - 75 fa 48 90 01 23 74 45 f0 90 00 03 e0 90 23 14

@0010 - f0 02 00 00 xx xx

Including the extra two bytes, count the number of bytes in total, in this case 22. Then add 256 to that making 278 in total and convert to hex 01 16. Replace the two unknown bytes with 01 16.

@0000 - 75 fa 48 90 01 23 74 45 f0 90 00 03 e0 90 23 14

@0010 - f0 02 00 00 01 16

You now have a list of bytes to download to the CMX850 using the BOOT ROM. To do this enable the boot ROM as described in data sheet section 1.4.4. Then immediately write the bytes, starting from location 0000, to the serial port in the form: -

0 xxxx xxxx 1 //start bit + data byte (lsb to msb) + stop bit.

Note: Code address data is not required, only Intel hex compatible code is required.

After the two length bytes wait a while for the Boot ROM to validate it, it will then automatically begin execution from the beginning of the down loaded code.


Please note the CML disclaimer notice for applications and FAQ information.

 
 
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