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Multi-mode Wireless Data Modem

CMX7164 - QAM, Multi-level FSK, GMSK/GFSK, V.23


Features:

  • GMSK, GFSK
  • 2-FSK, 4-FSK, 8-FSK, 16-FSK
  • 4-QAM, 16-QAM, 32-QAM, 64-QAM
  • V.23
  • Two Frame-Sync Detectors
  • Automatic Frame Sync Detect
  • Rx Crrier Fequency Correction
  • Receive Signal Quality Measurement
  • Over-air Compatible with Standard Modems
  • Robust Data Packet Modes

C-BUS Host Serial Interface:

  • SPI-like with Register Addressing
  • Read/Write 128-Byte FIFOs/Data Buffers

Master C-BUS/SPI Serial Interface:

  • For External Slave Devices
  • Pass-through Mode

High Performance I/Q Radio Analogue Interface:

  • Tx and Rx: 'Direct Connect' to Zero IF Transceiver
  • Simple External RC Filters
  • Configurable Rx and Tx Pulse Shaping Filters
  • Reconfigurable Digital Rx IF Filter
  • Deviation Control without Manual Trim

Auxiliary Functions:

  • Four 10-bit DACs and Four 10-bit ADCs
  • Autonomous RAMDAC Sequencer
  • Automatic Support For DC Calibration of CMX998
  • ADC Averaging and Trip on High/Low 'Watch Modes'
  • Four GPIO: Sequence GPIO on Rx or Tx Trigger
  • Start Tx on Digital Trigger Input
  • Automatic Gain Control

Applications:

  • High Performance Narrow-band Radio
  • For 6.25kHz to 25kHz RF Channel Spacing
  • Telemetry, SCADA and Data Modem Systems
  • Digital Software Defined Radio (SDR)
  • High-speed Wireless Data
  • FCC Part 90: New Spectral Efficiency Requirements
  • Mobile Data over Fading Channels

Supply Requirement:

  • 3.0 to 3.6 V Power Supply

The CMX7164 Multi-mode Wireless Data Modem is a half-duplex device supporting 4/16/32/64 QAM, 2/4/8/16 FSK, GMSK/GFSK and V.23 modes in multiple channel spacings, under host control.

Robust flexible packet data structures including forward error correction and raw data modes are available, supporting user-requirements covering a wide range of applications.

An integrated analogue interface supports direct connection to zero IF I/Q radio transceivers with few external components; no external codecs are required.

Intelligent auxiliary ADC, DAC and GPIO sub-systems perform valuable functions and minimise host interaction and host I/O resources. Two synthesised system clock generators develop clock signals for off-chip use.

The C-BUS/SPI master interface expands host C-BUS/SPI ports to control external devices.

The device utilises CML's proprietary FirmASIC component technology. On-chip sub-systems are configured by a Function Image data file that is uploaded during device initialisation and defines the device's function and feature set.

The devices modulation type is determined by its Function Image (FI) that is uploaded during device initialisation.

The differential inputs are ideal for direct connection to RF Building Block ICs such as CML’s CMX994, CMX994A, CMX994E RF Direct Conversion Receiver ICs

Function Images

  • GMSK/GFSK modulations (Function Image 7164FI-1.x) - with BT=0.5, 0.3, 0.27 or 0.25 and up to 20kbps. The GMSK packet data  is over-air compatible with the FX/MX909B and the CMX7143 (Function Image 7143FI-1.x)

  • 2-FSK, 4-FSK, 8-FSK and 16-FSK modulations (Function Image 7164FI-2.x)  - with root raised cosine filtered with α=0.2 with optional sinc filtering,  supporting up to 40 kbps in a 25kHz channel. Flexible bit rates support a wide range of applications requiring a selectable bit rate and robustness.The 4-FSK data is over-air compatible with the FX/MX919B and the (CMX)7143FI-2.x

  • 4-QAM, 16-QAM, 32-QAM and 64-QAM modulations (Function Image 7164FI-4.x) - are root raised cosine filtered with α=0.2, 0.35 or a user programmable filter. The 7164FI 4.x supports up to 96kbps in a 25kHz channel, with channel estimation and equalization to provide robust performance under realistic channel conditions. For greater flexibility, different rate FEC modes are provided. Receive signal quality measurement is supported, making a useful assessment of link conditions.

    Adaptive Coded Modulation (ACM) features allow modulation type and block format to be changed on the fly via over-air commands that control a receiving CMX7164.  They enable a Tx host to select optimum modulation and coding per burst to suit application message size, link channel quality and can also relax required Rx host message parsing speed.

  • V.23 Modem - Function Image 7164FI-6.x The V.23 modem enables communication with legacy telecom systems. The implementation supports 1200 baud 1 to 8 byte data blocks with start bit, stop bit and parity generation in transmit and start bit, stop bit and parity checking and removal in receive.

Function Image

System

Symbols

Symbol Rate

7164FI-1.x

GMSK/GFSK Modem

1

2,000 - 20,000 sym/s

7164FI-2.x

2-FSK, 4-FSK, 8-FSK, 16-FSK Modem

1, 2, 3, 4

2,000 - 10,000 sym/s

7164FI-4.x

4-QAM, 16-QAM, 32-QAM, 64-QAM Modem

2, 4, 5, 6

2,000 - 20,000 sym/s

7164FI-6.x

V.23 Modem

1

1,200 sym/s

 Block Diagram

 CMX7164 Block Diagram

Design Support Information

 

CMX7164 FAQ
 

Q.  Should pull-up or pull-down resistors be connected to  CMX7164 device GPIO pins (GPIOA, GPIOB, GPIOC, and GPIOD)?

A.  The CMX7164 features flexible GPIO pins that can be independently configured via C-BUS serial interface commands to operate in one of the following modes: CMOS digital output, CMOS digital input or CMOS digital input with bus hold. Bus hold automatically engages a 75kohm internal pull-up or pull-down resistor that reinforces the current logic state of the input signal. As is normally the case, the state of a CMOS digital input will be indeterminate and may increase device supply current when the input’s voltage is not at valid ‘0’ or ‘1’, i.e. when the node voltage is “floating.”

When the CMX7164 is RESET (by asserting its RESETN pin, issuing a C-BUS General RESET or by triggering an internal power on reset) all its GPIO pins are immediately placed in CMOS digital input mode. Any GPIO pins not being pulled either up or down by an external load will be floating. Once a Function Image™ is loaded into the device then all its GPIO pins are placed in CMOS digital input with bus hold.

If user circuits require one or more GPIO pins to be held at a deterministic ’0’ or ‘1’, i.e. not floating after RESET and before the Function Image™ is loaded then that circuit should connect external pull-up or pull-down circuits to such pins.

 
 
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