No DSP or Codecs required; simply upload
modulation Function Image (FI)
Automatic Gain Control
QAM 7163 FI-4.x
~ 4/16/64 QAM up to 96kbps in 25kHz
~ FEC and raw (uncoded) modes
~ Two x frame sync detectors
~ Automatic frame sync detectors
~ Rx carrier frequency and phase correction
High Performance I/Q Radio Analogue Interface
~ Tx and Rx: 'Direct connect' to zero IF tranceiver
~ Digital IF filter reconfigures for multiple RF channel spacings (Rx)
~ Deviation control without manual trim (Tx)
~ I/Q trims
C-BUS host Serial Interface
Read/write 128-byte FIFOs and data buffers streamline transfers and relax host service latency
~ Autonomous RAMDAC sequencer
~ Four x 10-bit ADCs
~ ADC averaging and trip on high/low 'watch' modes
~ Four x GPIO
~ Sequence GPIO on Tx or Rx trigger
~ Start Tx on digital trigger input
Master C-Bus/SPI Serial Interface
~ For external slave devices e.g. RF transceiver and synthesiser
~ Pass-through mode expands host C-BUS/SPI capacity
High Performance Narrow-band Data Radio
For 6.25kHz to 25kHz RF Channel Spacing
Telemetry, SCADA and Data Modem Systems
Digital Software Defined Radio (SDR)
High-speed Wireless Data
Compatible Worldwide with ETSI, FCC, ARIB and more
FCC Part 90: New Spectral Efficiency Requirements
3.0 to 3.6 V Power Supply
The CMX7163 QAM Modem is a low power half-duplex device supporting multiple channel spacings under host microcontroller (µC) control. Its Function Image (FI) is loaded to initialise the device and determine modulation types.
The 7163FI-4.x supports 4-QAM, 16-QAM, 32-QAM and 64-QAM modulations up to 96kbps in a 25kHz channel, with channel estimation and equalization to provide robust performance under realistic channel conditions.
Flexible bit rates support a wide range of applications requiring a selectable bit rate and robustness.
Forward error correction and raw modes are available and support user-defined packet structures to support a range of applications. For greater flexibility, different rate FEC modes are provided.
Receive signal quality measurement is supported, making a useful assessment of link conditions.
Adaptive Coded Modulation (ACM) features allow modulation type and block format to be changed on the fly via over-air commands that control a receiving CMX7164. They enable a Tx host to select optimum modulation and coding per burst to suit application message size, link channel quality and can also relax required Rx host message parsing speed.
High performance digital IF filters may be reconfigured to support multiple channel spacings via host command. This feature may eliminate the need to switch between multiple discrete IF filters.
An integrated analogue interface supports 'direct connection' to zero IF I/Q radio transceivers with few external components; no external codecs are required.
Intelligent auxiliary ADC, DAC and GPIO subsystems perform valuable functions and minimise host interaction and host I/O resources. Two synthesised system clock generators develop clock signals for off-chip use.
A C-BUS/SPI master interface expands host C-BUS/SPI ports to control external devices.
The device utilises CML's proprietary FirmASIC component technology. On-chip sub-systems are configured by a Function Image data file that is uploaded during device initialisation and defines the device's function and feature set.
The Function Image can be loaded automatically from a host µC over the C-BUS serial interface or from an external memory device.
The device's functions and features can be enhanced by subsequent Function Image releases, facilitating in-the-field upgrades.
Design Support Information
Q. Should pull-up or pull-down resistors be connected to CMX7163 device GPIO pins (GPIOA, GPIOB, GPIOC, and GPIOD)?
A. The CMX7163 features flexible GPIO pins that can be independently configured via C-BUS serial interface commands to operate in one of the following modes: CMOS digital output, CMOS digital input or CMOS digital input with bus hold. Bus hold automatically engages a 75kohm internal pull-up or pull-down resistor that reinforces the current logic state of the input signal. As is normally the case, the state of a CMOS digital input will be indeterminate and may increase device supply current when the input’s voltage is not at valid ‘0’ or ‘1’, i.e. when the node voltage is “floating.”
When the CMX7163 is RESET (by asserting its RESETN pin, issuing a C-BUS General RESET or by triggering an internal power on reset) all its GPIO pins are immediately placed in CMOS digital input mode. Any GPIO pins not being pulled either up or down by an external load will be floating. Once a Function Image™ is loaded into the device then all its GPIO pins are placed in CMOS digital input with bus hold.
If user circuits require one or more GPIO pins to be held at a deterministic ’0’ or ‘1’, i.e. not floating after RESET and before the Function Image™ is loaded then that circuit should connect external pull-up or pull-down circuits to such pins.