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TDMA Digital Radio Processor



Tx Functions:

  • Two-point modulation analogue outputs
  • Root-raised-cosine (alpha 0.2) pulse shaping
  • RAMDAC capability for PA ramping control
  • Tx trigger feature allowing precise control of burst start time
  • Tx burst sequence for automatic RAMDAC ramping and hardware switching

Rx Functions:

  • I/Q analogue inputs
  • Rx channel filtering and root-raised-cosine (alpha 0.2) pulse shaping
  • Data returned as hard-decision bits or 4-bit soft-decision LLR metrics
  • Automatic frame sync detection
  • Automatic tracking of symbol timing and input I/Q DC offsets
  • RSSI detection

Slot Timing Functions:

  • 30ms slot format (264-bit bursts)
  • Internal slot clock and timing maintenance
  • Automatic synchronisation to received channel
  • Automatic sequencing of hardware control

Auxiliary Functions:

  • Two programmable system clock outputs
  • Four auxiliary ADCs with six selectable input paths
  • SPI Thru-Port for interfacing to synthesisers and other serial-controlled devices
  • Four auxiliary DACs, one with built-in programmable RAMDAC

Host Interface:

  • Optimised C-BUS (4-wire, high speed synchronous serial command/data bus) interface to host for control and data transfer, including streaming C-BUS for efficient data transfer
  • Open drain IRQ to host
  • Four GPIO pins
  • Serial memory or C-BUS (host) boot mode.


  • ETSI TS 102 361 Digital Mobile Radio (DMR)
  • Police Digital Trunking (PDT) Radio

 Supply Requirement:

  • 3.3V

The CMX7161 FI-1.x is a half-duplex digital radio modem intended for use in two-slot TDMA systems such as the ETSI TS 102 361 standard for Digital Mobile Radio (DMR).

It uses root-raised-cosine (alpha 0.2) 4-FSK modulation in a 12.5kHz channel. Slot timing and synchronisation are handled automatically by the device.

An integrated analogue interface supports connection to a direct conversion receiver such as the CML CMX994 and two-point modulation transmitter with few external components; no external codecs are required.

Intelligent auxiliary ADC, DAC and GPIO sub-systems are provided to minimise required host interaction and host I/O resources. Two synthesised system clock generators develop clock signals for off-chip use. The C-BUS/SPI master interface expands host C-BUS/SPI ports to control external devices.

The CMX7161 operates from a 3.3V supply and is available in 64-pin VQFN and LQFP packages.

The device uses CML’s proprietary FirmASIC component technology. On-chip sub-systems are configured by a Function Image™ data file which is uploaded during device initialisation to define the device's function and feature set. The Function Image™ can be loaded automatically from a host µC over the C-BUS serial interface or from an external memory device. The device's functions and features can be enhanced by subsequent Function Image™ releases, facilitating in-the-field upgrades.


Design Support Information



Q.  Should pull-up or pull-down resistors be connected to CMX7161 device GPIO pins (GPIOA, GPIOB, GPIOC, and GPIOD)?

A.  The CMX7161 features flexible GPIO pins that can be independently configured via C-BUS serial interface commands to operate in one of the following modes: CMOS digital output, CMOS digital input or CMOS digital input with bus hold. Bus hold automatically engages a 75kohm internal pull-up or pull-down resistor that reinforces the current logic state of the input signal. As is normally the case, the state of a CMOS digital input will be indeterminate and may increase device supply current when the input’s voltage is not at valid ‘0’ or ‘1’, i.e. when the node voltage is “floating.”

When the CMX7161 is RESET (by asserting its RESETN pin, issuing a C-BUS General RESET or by triggering an internal power on reset) all its GPIO pins are immediately placed in CMOS digital input mode. Any GPIO pins not being pulled either up or down by an external load will be floating. Once a Function Image™ is loaded into the device then all its GPIO pins are placed in CMOS digital input with bus hold.

If user circuits require one or more GPIO pins to be held at a deterministic ’0’ or ‘1’, i.e. not floating after RESET and before the Function Image™ is loaded then that circuit should connect external pull-up or pull-down circuits to such pins.


Q. Can the CMX7161 be used in other 2-slot TDMA digital radio system such as APCO25 phase 2?

A. Function Image 7161FI-1.x that is currently available only supports to DMR ETSI TS102 361 standard.
If you have interest in the CMX7161 supporting APCO25 phase 2, please contact CML direct.

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