QAM Modem
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- Half-duplex QAM Modem
- 4/16/64 QAM: up to 96kbps in 25kHz
- Channel Estimation and Equalisation
- Packet and Raw Modes with FEC
- Formatted Blocks for Packet Construction
- Two Frame Sync Detectors and Auto Frame Sync Detect
- Rx Carrier Frequency and Phase Correction
- Zero IF Radio Interface
- Digital IF Filter (Rx) Reconfigures for Multiple RF Channel Spacings
- Tx and Rx 'Direct Connect'
- Automatic DC Offset Correction
- Rx Signal Quality Measurement
- Auxiliary DAC, ADC and GPIO Features
- Autonomous RAMDAC Sequencer
- Sequence GPIO on Tx or Rx Trigger
- Start Tx on Digital Trigger Input
- Synthesised Clock Generators
- Flexible C-BUS/SPI Serial Interface
- Pass-through Mode Expands Host C-BUS/SPI Capacity
- Interfaces Directly to CML RF ICs (e.g. CMX992, CMX994, CMX998)
- High Performance Narrow-band Radio
- For 6.25kHz to 25kHz RF Channel Spacing
- Telemetry, SCADA and Data Modem Systems
- Digital Software Defined Radio (SDR)
- High-speed Wireless Data
- Compatible Worldwide with ETSI, FCC, ARIB and Many Other Wireless Data Systems
- FCC Part 90: New Spectral Efficiency Requirements
- CMX7163L9 - 64-pin LQFP
- CMX7163Q1 - 64-pin VQFN
- 3.0 to 3.6 V Power Supply
The CMX7163 QAM Modem is a low power half-duplex device supporting multiple channel spacings under host microcontroller (µC) control. Its Function Image™ (FI) is loaded to initialise the device and determine modulation types.
The 7163FI-4.x supports 4-, 16- and 64-QAM modulations up to 96kbps in a 25kHz channel, with channel estimation and equalization to provide robust performance under realistic channel conditions.
Flexible bit rates support a wide range of applications requiring a selectable bit rate and robustness.
Forward error correction and raw modes are available and support user-defined packet structures to support a range of applications. For greater flexibility, different rate FEC modes are provided. Receive signal quality measurement is supported, making a useful assessment of link conditions.
High performance digital IF filters may be reconfigured to support multiple channel spacings via host command. This feature may eliminate the need to switch between multiple discrete IF filters.
An integrated analogue interface supports 'direct connection' to zero IF I/Q radio transceivers with few external components; no external codecs are required.
Intelligent auxiliary ADC, DAC and GPIO subsystems perform valuable functions and minimise host interaction and host I/O resources. Two synthesised system clock generators develop clock signals for off-chip use. A C-BUS/SPI master interface expands host C-BUS/SPI ports to control external devices.
The device utilises CML's proprietary FirmASIC® component technology. On-chip sub-systems are
configured by a Function Image™ data file that is uploaded during device initialisation and
defines the device's function and feature set.
The Function Image™ can be loaded automatically from a host µC over the C-BUS serial interface
or from an external memory device.
The device's functions and features can be enhanced by subsequent Function Image™ releases, facilitating in-the-field upgrades.
Block Diagram
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