ASIC Design Technologies
As a fabless ASIC vendor, CML is able to provide independant, unbiased technical and commercial advice on the best choice and most cost-effective technologies and processes.

Technologies and Processes
Technologies available include state-of-the-art processes: some customer requirements will necessitate the use of these. However, in many cases, mature lower-cost processes often meet the technical and commercial requirements of the project.


Silicon wafers
CML's designers have experience of a range of technologies down to deep sub-micron processes.
The Technologies list (below) provides an overview of the typical processes used by CML.

Silicon Vendors
CML targets processes from globally-recognised silicon vendors in Europe and the Far East, including UMC, XFAB, AMS, TSMC and Dongbu.

CMOS
CMOS technologies are widely used and can support a very broad range of application requirements, from high density, high performance digital circuits, with the option to incorporate complex IP cores, to analogue and mixed-signal circuits, including RF.

BiPolar
For higher power analogue, medium frequency RF or low noise applications, Bipolar Technology can provide a cost effective solution.

BiCMOS
For medium frequency RF applications, or in other systems where bipolar transistors can have advantage (low flicker noise, low offsets, high current densities), this can be a useful and cost effective process to use.
The combination of features afforded by having both bipolar and CMOS transistors produces uniquely advantageous analogue circuits and the CMOS allows these to be combined with dense, low power logic.

The result of a CML design - a die plot
SiGe
This is also a BiCMOS process but utilises the very high frequency capability of Silicon-Germanium. Not only does this process open the door to RF devices in the GHz region, but also allows the lowest power operation at lower RF frequencies.
Again, analogue design can be optimised by using the SiGe bipolar structures along with CMOS transistors where applicable, and the presence of a full CMOS capability enables high density, low power logic devices to be combined on the same substrate.